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ATOMIC-LAYER-DEPOSITED INDIUM OXIDE TRANSISTORS FOR BACK-END-OF-LINE MONOLITHIC 3D INTEGRATION

thesis
posted on 2023-12-04, 23:04 authored by Zhuocheng ZhangZhuocheng Zhang

As silicon (Si) technology advances to 3 nm node and beyond, vertically stacking in 3D is considered as the primary choice to increase the density of transistors per unit area for better chip performance. Therefore, looking for new materials capable of replacing Si in back-end-of-line (BEOL) compatible monolithic 3D (M3D) integration has become one of the most important topics in the current field of electronic devices. Recent developed atomic layer deposition (ALD) deposited indium oxide (In2O3) field-effect transistors (FETs) have realized excellent electrical performance including field effect mobility over 100 cm2/V·s, on/off ratio up to 1017 and on-state current (ION) over 2.5 mA/μm in nanometer thin In2O3 FETs, providing promising prospect for next generation electronics. In this thesis, four main In2O3 related topics are discussed to examine the practicality of ALD In2O3 as channel material in BEOL compatible applications. First, the bias stability of planar In2O3 transistors and the effect of tin doping are studied. Second, gate-all-around (GAA) In2O3 FETs are implemented to improve ION up to record high 20 mA/μm, and its reliability is systematically measured and analyzed. Third, multilayer In2O3 FETs are constructed to investigate the possibility of vertical stacking. Last, vertical full oxide transistors with In2O3 gate are demonstrated to prove the feasibility of potential 3D integration.

History

Degree Type

  • Doctor of Philosophy

Department

  • Electrical and Computer Engineering

Campus location

  • West Lafayette

Advisor/Supervisor/Committee Chair

Peide Ye

Additional Committee Member 2

Muhammad A. Alam

Additional Committee Member 3

Peter Bermel

Additional Committee Member 4

Haiyan Wang

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