BEYOND-CMOS DEVICES: LOGIC, INTERCONNECTS AND MEMORY

With the scaling of very large-scale integrated circuits (VLSI), conventional CMOS technologies are facing many challenges. For example, Si-based logic devices suffer from ever increasing leakage-currents and do not exhibit the desired electrostatics with continuous scaling. Copper interconnects’ resistivity monotonically increases with reducing wire cross sections. Memory devices notoriously face power consumption problems. Thus, novel materials and devices have been explored to resolve these problems. In logic devices, semiconducting 2D transition metal dichcolcogenides (TMDs) were applied as the channel material to enable further channel length scaling. Besides, strain engineering was used to modulate the band structure of 2D TMDs to achieve better device performance. In Cu interconnects, an 2D MoS₂ layer was inserted underneath thin Cu films and enhanced Cu’s electrical performance. By comparing the thickness dependence of Cu films’ resistivity on MoS₂ and SiO₂, MoS₂ has been demonstrated that it can be used to enhance the electrical performance of ultrathin Cu films due to improved specular surface scattering by up to 40%. In memory devices, to reduce the energy consumption, we took advantage of electrical fields rather than currents to control magnetization. Taking advantage of the magnetoelectric (ME) and its inverse effect, a strain-mediated magnetoelectric write and read operation simultaneously in Co₆₀Fe₂₀B₂₀/ Pb(Mg_1/3Nb_2/3)_0.7Ti_0.3O₃ heterostructures was demonstrated based on a pseudo-magnetization µ ≡ m_x²-m_y² rather than a net magnetization m_x, m_y or m_z. Also, the write operation was verified by ferromagnetic resonance measurements in both PMN-PT/CoFeB films and PMN-PT/CoFeB nanodots. Furthermore, stress induced magnetic field and the interfacial coupling strength have been extracted. Last, voltage-controlled magnetism in Fe₃GeTe₂ devices was discussed.