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Deeply-Scaled Fully Self-Aligned Trench MOSFETs in 4H-SiC

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posted on 27.07.2021, 18:24 by Madankumar SampathMadankumar Sampath

Increasing demand for higher power density in many applications such as Hybrid Electric Vehicles (HEVs) and renewable power generation has led to great technological advances in power electronics. To meet this increasing demand, a power semiconductor device needs to have low on resistance, increased switching speeds and reduced total system cost. Silicon (Si) power devices have been used for several decades but they are fundamentally limited by material properties. Silicon carbide (SiC) as a power semiconductor material offers superior electrical and thermal properties compared to silicon, which it can replace in a large spectrum of applications. Because of a lower critical electric field, drift regions in Si power transistors need to be much thicker and more lightly doped, which in turn increases the specific onresistance Ron,sp. To combat the drift resistance component for higher blocking voltages, superjunction MOSFETs for medium voltages and Si IGBTs for high voltages are used. Since IGBTs are bipolar transistors, they exhibit much higher switching energy losses than MOSFETs. The SiC MOSFET is an excellent candidate in the medium to high voltage range, which mainly targets the HEV market.

Due to their low channel mobility, SiC MOSFETs have not reached the theoretical limit below 1200 V where channel resistance is dominant. Planar DMOSFETs dominate the

commercial SiC market today because of higher yield and relatively simpler fabrication process, but trench MOSFETs can be made with a smaller cell area and thus lower Ron,sp. Due to lower cell-pitch and high integration density of trench-gate devices, they offer an opportunity to reduce the size and weight of HEV power control units by replacing IGBTs with MOSFETs. The single-trench UMOSFET was first reported in 1994 by CREE and the first oxide protected trench MOSFET in 1998 by Purdue. This structure inserts a grounded p-type region below the gate trench to protect the oxide in the blocking state. In 2012, Rohm Semiconductor reported a novel double-trench UMOSFET with separate gate and

field-protection trenches. In 2017, Infineon published their new trench UMOSFET, known as Cool-SiC, with high gate oxide reliability. In this work a deeply-scaled, fully-self-aligned trench MOSFET is fabricated and characterized. The innovative process described enables a record cell-pitch of 0.5 μm per channel, equivalent to a channel density 6Å~ higher than currently available commercial UMOSFETs.


Degree Type

Doctor of Philosophy


Electrical and Computer Engineering

Campus location

West Lafayette

Advisor/Supervisor/Committee Chair

Dallas T. Morisette

Additional Committee Member 2

James A. Cooper

Additional Committee Member 3

Mark S. Lundstrom

Additional Committee Member 4

Oleg Wasynchuk

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