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Modeling and Applications of Ferroelectric Based Devices

posted on 30.07.2021, 16:28 by Atanu Kumar SahaAtanu Kumar Saha

To sustain the upcoming paradigm shift in computations technology efficiently, innovative solutions at the lowest level of the computing hierarchy (the material and device level) are essential to delivering the required functionalities beyond what is available with current CMOS platforms. Motivated by this, in this dissertation, we explore ferroelectric-based devices for steep-slope logic and energy-efficient non-volatile-memory functionalities signifying the novel device attributes, possibilities for continual dimensional scaling with the much-needed enhancement in performance.

Among various ferroelectric (FE) materials, Zr doped HfO2 (HZO) has gained immense research attention in recent times by virtue of CMOS process compatibility and a considerable amount of ferroelectricity at room temperature. In this work, we investigate the Zr concentration-dependent crystal phase transition of Hf1-xZxO2 (HZO) and the corresponding evolution of dielectric, ferroelectric, and anti-ferroelectric characteristics. Providing the microscopic insights of strain-induced crystal phase transformations, we propose a physics-based model that shows good agreement with experimental results for 10 nm Hf1-xZxO2. Further, in a heterogeneous system, ferroelectric materials can exhibit negative capacitance (NC) behavior. Such NC effects may lead to differential amplification in local potential and can provide an enhanced charge and capacitance response for the whole system compared to their constituents. Such intriguing implications of NC phenomena have prompted the design and exploration of many ferroelectric-based electronic devices to not only achieve an improved performance but potentially also overcome some fundamental limits of standard transistors. However, the microscopic physical origin as well as the true nature of the NC effect, and direct experimental evidence remain elusive and debatable. To that end, in this work, we systematically investigate the underlying physical mechanism of the NC effect in the ferroelectric material. Based upon the fundamental physics of ferroelectric material, we investigate different assumptions, conditions, and distinct features of the quasi-static NC effect in the single-domain and multi-domain scenarios. While the quasi-static and hysteresis-free NC effect was initially propounded in the context of a single-domain scenario, we highlight that the similar effects can be observed in multi-domain FEs with soft domain-wall (DW) displacement. Furthermore, to obtain the soft-DW, the gradient energy coefficient of the FE material is required to be higher as well as the ferroelectric thickness is required to be lower than some critical values. Otherwise, the DW becomes hard, and their displacement would lead to hysteretic NC effects. In addition to the quasi-static NC, we discuss different mechanisms that can lead to the transient NC effects. Furthermore, we provide guidelines for new experiments that can potentially provide new insights on unveiling the real origin of NC phenomena.

Utilizing such ferroelectric insulators at the gate stack of a transistor, ferroelectric-field-effect transistors (FeFETs) have been demonstrated to exhibit both non-volatile memory and steep-slope logic functionalities. To investigate such diverse attributes and to enable application drive optimization of FeFETs, we develop a phase-field simulation framework of FeFETs by self-consistently solving the time-dependent Ginzburg-Landau (TDGL) equation, Poisson’s equation, and non-equilibrium Green’s function (NEGF) based semiconductor charge-transport equation. Considering HZO as the FE layer, we first analyze the dependence of the multi-domain patterns on the HZO thickness (TFE) and their critical role in dictating the steep-switching (both in the negative and positive capacitance regimes) and non-volatile characteristics of FeFETs. In particular, we analyze the TFE-dependent formation of hard and soft domain-walls (DW). We show that, TFE scaling first leads to an increase in the domain density in the hard DW-regime, followed by soft DW formation and finally polarization collapse. For hard-DWs, we describe the polarization switching mechanisms and how the domain density impacts key parameters such as coercive voltage, remanent polarization, effective permittivity and memory window. We also discuss the enhanced but positive permittivity effects in densely pattern multi-domain states in the absence of hard-DW displacement and its implication in non-hysteretic attributes of FeFETs. For soft-DWs, we present how DW-displacement can lead to effective negative capacitance in FeFETs, resulting in a steeper switching slope and superior scalability. In addition, we also develop a Preisach based circuit compatible model for FeFET (and antiferroelectric-FET) that captures the multi-domain polarization switching effects in the FE layer.

Unlike semiconductor insulators (e.g., HZO), there are ferroelectric materials that exhibit a considerably low bandgap (< 2eV) and hence, display semiconducting properties. In this regard, non-perovskite-based 2D ferroelectric -In2Se3 shows a bandgap of ~1.4eV and that suggests a combined ferroelectricity and semiconductivity in the same material system. As part of this work, we explore the modeling and operational principle of ferroelectric semiconductor metal junction (FeSMJ) based devices in the context of non-volatile memory (NVM) application. First, we analyze the semiconducting and ferroelectric properties of the α-In2Se3 van der Waals (vdW) stack via experimental characterization and first-principles simulations. Then, we develop a FeSMJ device simulation framework by self-consistently solving the Landau–Ginzburg–Devonshire equation, Poisson's equation, and charge-transport equations. Our simulation results show good agreement with the experimental characteristics of α-In2Se3-based FeSMJ suggesting that the FeS polarization-dependent modulation of Schottky barrier heights of FeSMJ plays a key role in providing the NVM functionality. Moreover, we show that the thickness scaling of FeS leads to a reduction in read/write voltage and an increase in distinguishability. Array-level analysis of FeSMJ NVM suggests a lower read-time and read-write energy with respect to the HfO2-based ferroelectric insulator tunnel junction (FTJ) signifying its potential for energy-efficient and high-density NVM applications.


Degree Type

Doctor of Philosophy


Electrical and Computer Engineering

Campus location

West Lafayette

Advisor/Supervisor/Committee Chair

Sumeet Kumar Gupta

Additional Committee Member 2

Kaushik Roy

Additional Committee Member 3

Peide Ye

Additional Committee Member 4

Prof. Anand Raghunathan