Physical and Circuit Compatible Modeling of VLSI Interconnects and Their Circuit Implications

Interconnects pose severe performance bottlenecks in advanced technology nodes due to multiple scaling challenges. To understand such problems and explore potential solutions, it is important to develop advanced models. This is particularly relevant for modern interconnects (especially vias) with complex structures with non- trivial current paths. In this dissertation, we develop a comprehensive physics-based interconnect models to capture surface and grain boundary scattering. We further analyze the circuit implications of 2D transition metal dichalcogenide (TMD)-augmented interconnects, which show potential in mitigating some of the scalability concerns of state-of-the-art interconnects. First, we propose a 2D spatially resolved model for surface scattering in rectangular interconnects based on the Fuchs-Sondheimer (FS) theory. The proposed spatially resolved FS (SRFS) model offers both spatial dependence and explicit relation of conductivity to physical parameters. We also couple the SRFS model with grain boundary scattering based on the Mayadas−Shatzkes (MS) theory. The SRFS-MS model is exact for diffusive surface scattering and offers a good approximation for elastic surface scattering. Furthermore, we develop a circuit-compatible version of the SRFS-MS model and show a close match with the physical SRFS-MS model (error < 0.7%). Moreover, we integrate temperature dependency, confirming that surface scattering has a negligible temperature-dependence. Second, we analyze the circuit implications of 2D TMD augmented interconnects and show the effective clock frequency of an AES circuit is boosted by 2%-32%. We also establish that the vertical resistivity of the TMD material must be below 22 kΩ-nm to obtain performance benefits over state-of-the-art interconnects in the worst-case process-temperature corner.