2D Tellurium and Indium Oxide as Novel Channel Materials for Energy-Efficient Transistors
As conventional silicon-based transistors approach their physical and performance limits, the search for alternative channel materials and device architecture has grown increasingly urgent. Two-dimensional (2D) materials offer a compelling path forward due to their atomic thinness, electrostatic gate control, and tunable electronic properties. Among them, tellurium (Te) stands out as a narrow-bandgap semiconductor with high carrier mobility for both electrons and holes, at least at cryogenic temperatures. In this work, we demonstrate ultralow-voltage Te field-effect transistors and complementary metal-oxide-semiconductor (CMOS) inverters. Leveraging self-formed metal contacts and engineered gate dielectrics, these Te-based devices exhibit sub-thermionic subthreshold swings, noise-free switching, and stable operation down to 0.08 V supply voltages. The resulting CMOS circuits display clear voltage transfer characteristics and gain, showcasing the viability of Te as a platform for energy-efficient logic.
Beyond front-end innovation, realizing monolithic three-dimensional integration demands back-end-of-line (BEOL) compatible semiconductors. Amorphous In₂O₃, deposited via atomic layer deposition, offers promise due to its low processing temperature, excellent uniformity, and extremely low off-state current, making it ideal for low-power logic such as gain cells or potential complementary FET (CFET) architectures. In this study, over 10,000 In₂O₃-based FETs and ferroelectric FETs are fabricated on 200 mm wafers and thoroughly characterized. The FETs exhibit high yield, an average mobility of 91.6 cm²/V·s, and a tight threshold voltage distribution (σ = 0.11 V). Optimization of channel thickness and oxygen content enables a favorable trade-off among mobility, subthreshold slope, and threshold voltage. Ferroelectric In₂O₃-based FETs with HfZrOₓ gate dielectrics demonstrate a uniform memory window averaging 1.38 V with 99.0% yield and strong scalability as confirmed by channel length dependence.
Together, the demonstration of ultralow-voltage CMOS circuits based on 2D Te and the statistical validation of energy-efficient In₂O₃ devices underscores the potential of these emerging semiconductors for next-generation low-power, high-density logic and memory systems. This work highlights the synergy between narrow-bandgap 2D semiconductors and scalable oxide electronics, establishing a foundation for continued innovation in advanced CMOS and BEOL-integrated architectures.
History
Degree Type
- Master of Science in Engineering
Department
- Electrical and Computer Engineering
Campus location
- West Lafayette