<b>FULLY DETERMINISTIC STORAGE BASED LOGIC BUILT-IN SELF-TEST FOR FAULT DETECTION AND DIAGNOSIS</b>

<p dir="ltr">The rapid advancement in the automotive industry and other safety critical applications demands exceptionally reliable chips. The long-term reliability and functional safety of these chips are challenged by defects that may evolve over time due to aging, as well as defects that escaped manufacturing tests. This emphasizes the need for testing and monitoring throughout the entire silicon lifecycle, not only during manufacturing but also during in-field operations after deployment. Recent research works reported device aging as one of the causes for silent data errors that occur in large datacenters. Such incidents further stress the importance of in-field testing to address aging-induced defects. All these challenges demand high quality test solutions that meet the following requirements. The test solutions should be capable of performing in-field testing with high fault coverage, low test application time to meet the test time constraints, and low test data volume. Logic Built-In Self-Test (LBIST) enables in-field testing as it does not require an external tester. The goal of this thesis work is to develop LBIST based test solutions that meet all the aforementioned requirements. This thesis proposes a fully deterministic storage based LBIST approach that stores on-chip, reduced partitioned deterministic test data and the deterministic combinations that indicate which test data entries should be combined to form tests. The goal of this approach is to eliminate the need for pseudorandom tests, which in turn reduces the number of tests required to achieve complete fault coverage. As a result, the total test application time is reduced, thereby allowing this LBIST solution to meet the test time constraints that exist during system startup and periodic in-field testing. The thesis first describes the fully deterministic storage based LBIST applied to single stuck-at faults. It stores on-chip, subsets of scan vectors and permutations of scan vector indices. The same permutations are applied to all the subsets, magnifying the effectiveness of each stored permutation and each subset, thereby reducing the storage requirements. Next, the thesis presents low power LBIST methodology for generating low power broadside and skewed-load tests from stored test data targeting transition faults. This method shares the test data between broadside and skewed-load tests, which helps in reducing the storage requirements beyond the use of partitioning and combinations alone. While the earlier parts of the thesis present LBIST approaches for fault detection, the thesis next describes an LBIST scheme for generating a test set that is useful for logic diagnosis. Finally, the thesis describes fully deterministic storage based LBIST with compressed tests and addresses the in-field testing scenario where testing periods may vary in length. In this case, short test periods should target the faults that are the most susceptible to aging, while long test periods can target a complete fault set. The target faults are ranked based on a device level analysis that yields their likelihood of occurrence due to the aging effects HCI and NBTI. The on-chip stored test data is arranged based on the ranked faults thereby enabling on-chip generation of ordered tests that support varying periods of in-field testing.</p>