INTELLIGENT MODEL TO DETECT AND CLASSIFY SILICON WAFER MAP IMAGES

The study builds and evaluates three advanced neural network models—ResNet-34, EfficientNet B0, and SqueezeNet—for defect detection and classification of silicon wafer map images. The study evaluates the neural network model in two cases, binary and multi-class classifications. The binary classification, which is crucial for promptly determining whether a wafer map is defective, EfficientNet-B0 led with the highest test accuracy of 94.62% and an average accuracy of 93.2%. Similarly, in multi-class classification, necessary for pinpointing specific defect causes early in the manufacturing process, EfficientNet-B0 achieved the top test accuracy of 84.22% with an average accuracy of 84.07%. Further enhancements in the study resulted from strategic pruning of EfficientNet-B0, specifically the removal of Residual Block 2 after convolutional layer visualization revealed minimal impact on accuracy, with a reduction of just 1.33%. These modifications not only refined the learning process but also reduced the model size by 33%, thereby increasing computational efficiency. The integration of Grad-CAM++ visualizations ensured the model focused on pertinent features, thus boosting the transparency and reliability of the defect detection process. The results underscore the potential of advanced neural networks to significantly enhance the accuracy and efficiency of semiconductor manufacturing.