Purdue University Graduate School
Dissertation_Ahmedullah_Aziz-uploaded-July_23_2019.pdf (12.57 MB)

Device-Circuit Co-Design Employing Phase Transition Materials for Low Power Electronics

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posted on 2019-08-12, 18:47 authored by Ahmedullah AzizAhmedullah Aziz

Phase transition materials (PTM) have garnered immense interest in concurrent post-CMOS electronics, due to their unique properties such as - electrically driven abrupt resistance switching, hysteresis, and high selectivity. The phase transitions can be attributed to diverse material-specific phenomena, including- correlated electrons, filamentary ion diffusion, and dimerization. In this research, we explore the application space for these materials through extensive device-circuit co-design and propose new ideas harnessing their unique electrical properties. The abrupt transitions and high selectivity of PTMs enable steep (< 60 mV/decade) switching characteristics in Hyper-FET, a promising post-CMOS transistor. We explore device-circuit co-design methodology for Hyper-FET and identify the criterion for material down-selection. We evaluate the achievable voltage swing, energy-delay trade-off, and noise response for this novel device. In addition to the application in low power logic device, PTMs can actively facilitate non-volatile memory design. We propose a PTM augmented Spin Transfer Torque (STT) MRAM that utilizes selective phase transitions to boost the sense margin and stability of stored data, simultaneously. We show that such selective transitions can also be used to improve other MRAM designs with separate read/write paths, avoiding the possibility of read-write conflicts. Further, we analyze the application of PTMs as selectors in cross-point memories. We establish a general simulation framework for cross-point memory array with PTM based selector. We explore the biasing constraints, develop detailed design methodology, and deduce figures of merit for PTM selectors. We also develop a computationally efficient compact model to estimate the leakage through the sneak paths in a cross-point array. Subsequently, we present a new sense amplifier design utilizing PTM, which offers built-in tunable reference with low power and area demand. Finally, we show that the hysteretic characteristics of unipolar PTMs can be utilized to achieve highly efficient rectification. We validate the idea by demonstrating significant design improvements in a Cockcroft-Walton Multiplier, implemented with TS based rectifiers. We emphasize the need to explore other PTMs with high endurance, thermal stability, and faster switching to enable many more innovative applications in the future.


Defense Advanced Research Project Agency (DARPA)

Semiconductor Research Corporation (SRC) – Global Research Collaboration (GRC) Program

Center for Low Energy Systems Technology (LEAST), one of the six SRC STARnet Centers, sponsored by MARCO and DARPA

New Materials for Logic, Memory and Interconnects (NEWLIMITS), a center in nCORE, a Semiconductor Research Corporation (SRC) program sponsored by NIST


Degree Type

  • Doctor of Philosophy


  • Electrical and Computer Engineering

Campus location

  • West Lafayette

Advisor/Supervisor/Committee Chair

Dr. Sumeet Kumar Gupta

Additional Committee Member 2

Dr. Anand Raghunathan

Additional Committee Member 3

Dr. Kaushik Roy

Additional Committee Member 4

Dr. Zhihong Chen